The present invention relates generally to data processing systems and more particularly to data processing systems having so-called interrupt and trap processing capabilities.
Many if not all computers now in use have trap and interrupt structures, various implementations of which were originally designed as much as 10 to 15 years ago. In some respects, due to the expensive logic and non-existent microprogramming, the various designs thereof did not include the expanded functionality which is expected in today's computer systems. It is important to have flexible and expanded functionality in order to enable the integration of such interrupt and trap mechanisms in a manner which simplifies the programming of a computer and which improves system performance. Some such functionalities in the interrupt structure include the areas of scheduling, arbitration, and termination which has hitherto been relegated to software. In the trap mechanism, special provisions for passing of parameters and work space is also a desired functionality.
It is important to distinguish between traps and interrupts particularly by their functionalities. Traps are breaks which result directly from the execution of instructions in the computer system. Frequently known as internal or synchronous interrupts, traps exist to deal with process-specific conditions such as register overflow, use of an unimplemented instruction, or reference to uninstalled memory. Trap service routines are agents of the currently active process, and upon completion will either return control to that process at the point at which invoked, or suspend that process and return control to the system. Interrupts and more particularly external interrupts, i.e., interrupts received from a device coupled for service by the data processor, and invoked by conditions unrelated to the current process, such as external events or devices requiring service or by permanent changes in the status of the current process relative to other processes or to external interrupts, such as suspension of the current process upon completion of its task, or changing the priority level of the current process. Traps differ significantly from interrupts in the nature and amount of context saved before entering a trap handling procedure.
It is desirable in a trap mechanism, in response to a trap condition, i.e., addressing of uninstalled memory, to enter a sequence designed to handle the condition automatically, without the need for time consuming tests each time such a trap condition arises. This permits the writing of more efficient computer programs by removing the need for many in line tests. It also permits the running or execution of a program on a system not having certain central processor options used by the program, since the trap handling routine may be provided to simulate the option. This enhances the system integrity by detecting many program error conditions. It is accordingly important, upon the detection of a trap condition, to immediately respond to the trap condition and perform in as efficient a manner as possible, a partial context save of the running program in predefined memory areas. It is also necessary to expeditiously store such information describing the cause of the trap condition and transfer control to a suitable response program. In order to minimize the amount of memory area which is needed, and in order to efficiently associate such memory areas having the stored context in association with the priority or interrupt level of the running process, it is important to provide flexibility with respect to the use of such predefined memory areas.
It is accordingly a primary object of the present invention to provide a data processing system having an improved trap structure for use in efficiently servicing various conditions caused directly or indirectly by a process which may be executing in a data processing system.